1. Field of the Invention
The present invention relates to methods of manufacturing electronic components. More particularly, the present invention relates to a method of manufacturing an electronic component including chip surface mount devices including electrodes at both ends thereof. The chip surface mount devices are mounted on a substrate in a state in which the chip surface mount devices are arranged in series.
2. Description of the Related Art
Methods of manufacturing electronic components are known in which surface mount devices are mounted on substrates by performing a reflow process after the surface mount devices are installed on the substrates.
Mounting the surface mount devices so as to be in contact with each other by using the manufacturing methods using the reflow process has been proposed.
For example, FIG. 5 shows an example in which surface mount devices 101 and 102 are installed on a substrate 103. The surface mount device 101 is installed on the substrate 103 so that the locations of solder bumps 107 provided on electrodes 101b of the surface mount device 101 are shifted from land electrodes 104 on the substrate 103, and the surface mount device 102 is installed on the substrate 103 so that the locations of the solder bumps 107 provided on electrodes 102b of the surface mount device 102 are shifted from land electrodes 105 on the substrate 103.
Then, the surface mount devices are put through a reflow oven. When the surface mount devices are subjected to the reflow process, a main body 101a of the surface mount device 101 and a main body 102a of the surface mount device 102 are moved so as to be close to each other due to the surface tension of the solder bumps 107 that are melted by the heating, as shown by arrows in FIG. 6.
As a result, as shown in FIG. 7, the surface mount devices 101 and 102 are fixed on the substrate 103 with solders 106 sandwiched therebetween in a state in which an end surface of the surface mount device 101 is in contact with an end surface of the surface mount device 102 (for example, refer to Japanese Unexamined Patent Application Publication No. 2005-347660).
An electronic component can be manufactured by the following method, in which chip surface mount devices each including electrodes at both ends thereof are mounted on a substrate in a state in which the chip surface mount devices are arranged in series.
FIGS. 1A to 1C are cross-sectional views schematically showing an example of a process of manufacturing an electronic component 10x in a reference example.
Specifically, as shown in the cross-sectional view in FIG. 1A, joint materials 22, 24, 26, and 28, such as cream solder, are applied on land electrodes 12x, 15, and 18x that are formed on a substrate 11 so as to be aligned with each other. Then, as shown in FIG. 1B, first and second surface mount devices 30 and 40 of a chip type are installed on the substrate 11 so as to be spaced apart from each other. The first surface mount device 30 includes electrodes 34 and 36 at both ends of its main body 32 and the second surface mount device 40 includes electrodes 44 and 46 at both ends of its main body 42. Then, the first and second surface mount devices 30 and 40 are put through a reflow oven to melt the joint materials 22, 24, 26, and 28. A force that moves the first and second surface mount devices 30 and 40 so as to be close to each other is applied to the first and second surface mount devices 30 and 40 due to the surface tension of the joint materials 22, 24, 26, and 28, as shown by arrows 38 and 48 in FIG. 1B. As a result, as shown in FIG. 1C, the first and second surface mount devices 30 and 40 are moved due to the reflow oven and, therefore, it is possible to manufacture the electronic component 10x in which the first and second surface mount devices 30 and 40 are mounted in a state in which the first surface mount device 30 is closer to the second surface mount device 40, as compared to the state before the reflow.
However, since the electrodes 36 and 44 are also formed on end surfaces 37 and 47 of the first and second chip surface mount devices 30 and 40, respectively, a joint material 25 is suctioned upward due to the capillary action so as to enter a region between the end surface 37 of the first surface mount device 30 and the end surface 47 of the second surface mount device 40, which are opposed to each other, as shown in FIG. 1C. As a result, a gap 50 is formed between the end surface 37 of the first surface mount device 30 and the end surface 47 of the second surface mount device 40, which are opposed to each other.
Narrowing the gap 50 between the end surface 37 of the first surface mount device 30 and the end surface 47 of the second surface mount device 40 enables the electronic component 10x to be reduced in size.